JPS58209253A - デイジタル信号伝送方法 - Google Patents

デイジタル信号伝送方法

Info

Publication number
JPS58209253A
JPS58209253A JP57092280A JP9228082A JPS58209253A JP S58209253 A JPS58209253 A JP S58209253A JP 57092280 A JP57092280 A JP 57092280A JP 9228082 A JP9228082 A JP 9228082A JP S58209253 A JPS58209253 A JP S58209253A
Authority
JP
Japan
Prior art keywords
bit
word
signal
data
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57092280A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0420297B2 (en]
Inventor
Masato Tanaka
正人 田中
Tadao Suzuki
忠男 鈴木
Yoshio Osakabe
義雄 刑部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP57092280A priority Critical patent/JPS58209253A/ja
Publication of JPS58209253A publication Critical patent/JPS58209253A/ja
Publication of JPH0420297B2 publication Critical patent/JPH0420297B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP57092280A 1982-05-29 1982-05-29 デイジタル信号伝送方法 Granted JPS58209253A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57092280A JPS58209253A (ja) 1982-05-29 1982-05-29 デイジタル信号伝送方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57092280A JPS58209253A (ja) 1982-05-29 1982-05-29 デイジタル信号伝送方法

Publications (2)

Publication Number Publication Date
JPS58209253A true JPS58209253A (ja) 1983-12-06
JPH0420297B2 JPH0420297B2 (en]) 1992-04-02

Family

ID=14049987

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57092280A Granted JPS58209253A (ja) 1982-05-29 1982-05-29 デイジタル信号伝送方法

Country Status (1)

Country Link
JP (1) JPS58209253A (en])

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2590428A1 (fr) * 1985-11-19 1987-05-22 Telecommunications Sa Procede de codage en code cmi d'informations numeriques organisees en trame, le dispositif de mise en oeuvre, et son application a des informations de servitude pour reseau numerique a grand debit
WO2025134314A1 (ja) * 2023-12-21 2025-06-26 三菱電機株式会社 無線通信装置、無線通信方法、制御回路および記憶媒体

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2590428A1 (fr) * 1985-11-19 1987-05-22 Telecommunications Sa Procede de codage en code cmi d'informations numeriques organisees en trame, le dispositif de mise en oeuvre, et son application a des informations de servitude pour reseau numerique a grand debit
WO2025134314A1 (ja) * 2023-12-21 2025-06-26 三菱電機株式会社 無線通信装置、無線通信方法、制御回路および記憶媒体

Also Published As

Publication number Publication date
JPH0420297B2 (en]) 1992-04-02

Similar Documents

Publication Publication Date Title
US4027335A (en) DC free encoding for data transmission system
US4167760A (en) Bi-phase decoder apparatus and method
JPH06195893A (ja) データ記録方法及び装置
JPH0522424B2 (en])
IE45458B1 (en) Miller-encoded message decoder
JPH0118615B2 (en])
US4740998A (en) Clock recovery circuit and method
US4291408A (en) System for monitoring bit errors
US4007421A (en) Circuit for encoding an asynchronous binary signal into a synchronous coded signal
JPS58209253A (ja) デイジタル信号伝送方法
JP2746610B2 (ja) デイジタル信号の伝送方法
GB2032228A (en) DC free encoding for data transmission
US4437086A (en) Limited look-ahead means
JPS6222293B2 (en])
JP3697809B2 (ja) 信号検出回路
JPS59138155A (ja) デイジタル信号伝送方法
JPH01292927A (ja) データ伝送方式
JP2535393B2 (ja) 同期信号検出回路
JPS5859651A (ja) デジタル信号伝送方法
JPS6340384B2 (en])
KR950002762Y1 (ko) 디지탈 디스크 재생장치의 동기 검출회로
JPH0556087A (ja) 変調周波数検出回路
JPH0416979B2 (en])
JPS60195783A (ja) デジタル復調装置
JPS60130953A (ja) Msk復調回路